Ramandeep Narwal

Ramandeep Narwal

Ph.D. Candidate

North Carolina State University

Welcome!

I am a Ph.D. candidate in the Power Electronics Research Group of Prof. Subhashish Bhattacharya at the FREEDM Systems Center, NC State University.

Interests
  • Power Electronics
  • Hardware Design and Development
  • Converter modeling and Control
  • Bidirectional Switches
  • Semiconductor devices static and dynamic characterization
  • Power module packaging
Education
  • Ph.D. in Electrical Engineering, 2019 - 2024

    North Carolina State University

  • Masters in Electrical Engineering, 2018 - 2023

    North Carolina State University

  • Bachelors in Electrical and Electronics Engineering, 2012 - 2016

    Guru Gobind Singh Indraprastha University

Technical Skills

Altium Designer

Designed 20+ PCBs, including power stages (upto 100 A, 1000 V), gate drivers, protection circuits, high-frequency sensor cards, and differential mode filters.

PLECS

Simulated circuits to test controller design, estimate components’ losses and system efficiency, and design thermal management system.

Verilog

Wrote controller and protection modules for multiple converters, including matrix converter based single-stage AC/DC converter and current-source converter.

Xilinx Vivado and Vitis

Used for FPGA design (block diagram, PL and PS communication, constraints definition, and signal monitoring) and programming.

Python

Wrote optimization algorithms to output look-up tables for converter control.

MATLAB and LTspice

Used over the years for school projects.

Curve Tracer

Performed die-level and package/module-level static characterization of SiC MOSFETs and BiDFETs, including V-I characteristics, gate leakage, gate voltage threshold, drain-source breakdown voltage, drain leakage, and transconductance.

Solder dispenser, Reflow oven, and Wire bonder

Fabricated BiDFET-based half-bridge power modules using these equipment.

SolidWorks, COMSOL and Ansys Q3D

Learnt these during semiconductor packaging course for power module design, thermal simulation, and parasitic inductances and capacitances estimation.

Experience

 
 
 
 
 
Graduate Research Assistant
September 2019 โ€“ Present Raleigh, North Carolina, USA

๐๐ข๐๐ข๐ซ๐ž๐œ๐ญ๐ข๐จ๐ง๐š๐ฅ ๐“๐ก๐ซ๐ž๐ž-๐ฉ๐ก๐š๐ฌ๐ž ๐‚๐ฎ๐ซ๐ซ๐ž๐ง๐ญ ๐’๐จ๐ฎ๐ซ๐œ๐ž ๐‚๐จ๐ง๐ฏ๐ž๐ซ๐ญ๐ž๐ซ ๐›๐š๐ฌ๐ž๐ ๐๐ฎ๐œ๐ค-๐›๐จ๐จ๐ฌ๐ญ ๐€๐‚/๐ƒ๐‚ ๐’๐ฒ๐ฌ๐ญ๐ž๐ฆ ๐ฎ๐ฌ๐ข๐ง๐  ๐๐ข๐๐ข๐ซ๐ž๐œ๐ญ๐ข๐จ๐ง๐š๐ฅ ๐’๐ฐ๐ข๐ญ๐œ๐ก๐ž๐ฌ

  • Design and hardware implementation of a 10 kW buck-boost AC/DC system, consisting of an interleaved buck converter and bidirectional switches based current-source converter, for 400 โˆ’ 800 V DC to 480 Vrms applications.
  • Evaluated the impact of different commutation and modulation schemes on the converter performance.
  • For the hardware prototype at 480 Vrms, 10 kW output with a 400-800 V DC input and 100 kHz switching frequency, system efficiency and AC currents THD varied between 98.85 % to 98.14 % and 3.8 % to 1.3 %, respectively.

๐“๐ก๐ซ๐ž๐ž-๐ฉ๐ก๐š๐ฌ๐ž ๐š๐ง๐ ๐’๐ข๐ง๐ ๐ฅ๐ž-๐ฉ๐ก๐š๐ฌ๐ž ๐ˆ๐ฌ๐จ๐ฅ๐š๐ญ๐ž๐ ๐’๐ข๐ง๐ ๐ฅ๐ž-๐ฌ๐ญ๐š๐ ๐ž ๐€๐‚/๐ƒ๐‚ ๐‚๐จ๐ง๐ฏ๐ž๐ซ๐ญ๐ž๐ซ๐ฌ ๐ฎ๐ฌ๐ข๐ง๐  ๐Œ๐จ๐ง๐จ๐ฅ๐ข๐ญ๐ก๐ข๐œ ๐๐ข๐๐ข๐ซ๐ž๐œ๐ญ๐ข๐จ๐ง๐š๐ฅ ๐’๐ฐ๐ข๐ญ๐œ๐ก๐ž๐ฌ

  • Design and hardware implementation of 2.3 kW single-phase and 10 kW three-phase, single-stage, bidirectional, isolated AC/DC converters using in-house designed and packaged monolithic SiC Bidirectional FET (BiDFET).
  • Hardware design includes power stage, FPGA and DSP based control, gate drive, overvoltage and overcurrent protections, high-frequency voltage and current sensing circuits, differential-mode EMI filter, system-level protections, and thermal design.
  • Single-phase converter achieved 95.3% efficiency, 4.7% current THD at 400 V DC input and 277 Vrms output at 100% load.
  • Three-phase converter achieved 98.1% efficiency, 3.5% current THD at 800 V DC input and 480 Vrms output at 100% load.

๐’๐ญ๐š๐ญ๐ข๐œ ๐š๐ง๐ ๐ƒ๐ฒ๐ง๐š๐ฆ๐ข๐œ ๐‚๐ก๐š๐ซ๐š๐œ๐ญ๐ž๐ซ๐ข๐ณ๐š๐ญ๐ข๐จ๐ง ๐จ๐Ÿ ๐Œ๐จ๐ง๐จ๐ฅ๐ข๐ญ๐ก๐ข๐œ ๐’๐ข๐‚ ๐š๐ง๐ ๐†๐š๐ ๐๐ข๐๐ข๐ซ๐ž๐œ๐ญ๐ข๐จ๐ง๐š๐ฅ ๐’๐ฐ๐ข๐ญ๐œ๐ก๐ž๐ฌ

  • Die-level and package/module-level static characterization of switches, including V-I characteristics, transconductance, gate leakage, gate voltage threshold, drain-source leakage, and parasitic capacitances using curve tracer.
  • Commutation cell design, including commutation loop optimization, gate driver design (gate resistance selection optimized for tradeoffs between switching losses, overvoltage, dv/dt induced false turn-on, negative gate voltage limit with/without miller clamp or other clamping mechanisms and other system-level considerations), short-circuit fault protection,and open-circuit fault protection.
  • Dynamic characterization to determine switching losses; transition times; dead-time and overlap-time requirement; and protection circuitry testing.
  • Design and hardware validation of the on-chip temperature sensor in SiC BiDFETs.

๐‡๐ข๐ ๐ก-๐๐จ๐ฐ๐ž๐ซ ๐’๐ข๐ง๐ ๐ฅ๐ž-๐๐ก๐š๐ฌ๐ž ๐๐…๐‚ C๐จ๐ง๐ฏ๐ž๐ซ๐ญ๐ž๐ซ

  • Performance evaluation of Si, SiC and GaN FETs based high-power (>5kW), single-phase power factor correction (PFC) converters including conventional and bridge-less topologies.
  • Design, hardware implementation, debugging and testing of high-power, wide-input, grid-connected, low-cost, high-efficiency (80 PLUS Platinum standard), low input current THD (based on IEEE 519 and FCC/CISPR recommendations), single-phase PFC converter.
  • Design included power-stage, analog control, inrush current limiting circuit, EMI filter, protection circuitry, FETs gate-drive, sensor circuits, auxiliary power supply, thermal design, component selection, schematic capture, and PCB layout.
  • Design validation testing included electrical performance testing in the whole input voltage and load range, and thermal performance testing in the whole input voltage range at full load.
  • Hardware design met all the electrical performance indices in the whole operating range per relevant efficiency, THD and PF standards.
  • Semiconductor devices’ junction temperatures were estimated by sensing the baseplate temperatures. Estimated worst-case junction temperatures for devices were 30-50C below their rated values.
 
 
 
 
 
Power Electronics Intern
May 2019 โ€“ August 2019 Kokomo, Indiana, USA
  • Analysis and testing of 2.5 kW Phase-Shifted Full-Bridge converter (PSFB) with Full-Wave Rectifier as output stage.
  • Design, hardware implementation, debugging and testing of โ€œBuck converter based Active Clampโ€ to reduce voltage stress and ringing across the secondary-side switches of PSFB converter.
 
 
 
 
 
Co-founder
Cleantech Startup (Unregistered)
August 2017 โ€“ January 2018 Delhi, India
  • Worked towards the development and deployment of extra low voltage DC systems and microgrids in under-electrified rural areas of India.
  • Designed a multiple-input, multiple-output converter to power the household essentials through intelligent use of available power from electric grid, off-grid solar PV system, and electric batteries.
  • With solar PV and battery (which are inherently DC) as sources, the direct use of DC power would result in the reduction of power converter stages (AC to DC and DC to AC conversions) for feeding modern DC compatible devices (like LED lights, LED television, fans, water purifiers, laptops, mobiles etc, which have an AC to DC converter as their input stage), leading to increased reliability and better efficiency.
 
 
 
 
 
Electrical Design Engineer
July 2016 โ€“ July 2017 Uttar Pradesh, India
  • Worked on worldโ€™s first retrofittable cooling backup product, for milk cooling and cold storage.
  • Designed BLDC motor controller (24V, 48V, and 310V), AC/DC converters, DC/DC converters, PFC Boost converter-based power supply, gate drivers, and motor electromagnetic configuration (pole/slot ratio, stator size, rotor size, winding pattern and number of turns, and wire gauge size) for different applications: refrigerant pump, condenser fan, and ceiling fan.
  • Integrated the cold storage including compressor unit, evaporator and thermal battery to off-grid solar PV system.
  • Hired and managed the technical staff, consultants, and vendors.
 
 
 
 
 
Research Intern
June 2015 โ€“ August 2015 Delhi, India
  • Worked under the guidance of Dr. Rachna Garg on a hardware research project ‘200W solar-powered battery-backed DC nanogrid using NI myRIO’.
  • Developed MATLAB simulations of hardware topology and LabVIEW program of MPPT algorithm.
  • Designed magnetic components like transformer and inductor.

Contact

Feel free to reach out if you have:

  • Ideas you’d like to brainstorm
  • Questions about my work
  • Exciting job opportunity